Next Generation Data Processing for Future X-ray Observatories

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Dokumentart: PhDThesis
Date: 2015-07
Language: English
Faculty: 7 Mathematisch-Naturwissenschaftliche Fakultät
Department: Astronomie
Advisor: Santangelo, Andrea (Prof. Dott.)
Day of Oral Examination: 2015-07-23
DDC Classifikation: 500 - Natural sciences and mathematics
530 - Physics
Keywords: Astronomie , Röntgenastronomie , Datenverarbeitung , Satellit
Other Keywords: LOFT
Data Processing
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During the last two decades space-based X-ray observatories have been used to study the most energetic sources in the Universe and to investigate the physics and characteristics of matter under extreme conditions. Detectors sensitive to X-ray photons have been significantly improved, their area has increased, their energy resolution has reached the Fano limit, and the detector deadtime has been reduced to nanoseconds. These technological advancements have enabled X-ray observations with very high time resolution. Concepts of instruments capable of producing spectra or single events with high time resolution are the High Time Resolution Spectrometer (HTRS) aboard the International X-Ray Observatory (IXO) and the Large Area Detector (LAD) aboard the Large Observatory for X-ray Timing (LOFT). While the detectors of these instruments can detect every single photon coming from an X-ray source, the subsequent data processing electronics have to deal with unprecedented bandwidths. Depending on the brightness of the source and the available telemetry bandwidth from the satellite to the ground station the need for data compression and even reduction arises. This talk presents the work that was done in the context of the development of two instruments. One part is the development of the Data Processing Unit (DPU) for the HTRS aboard IXO that includes a LEON3 microprocessor model in a Spartan 3 FPGA used for data compression. The second part is the definition of several components for the data handling chain of the LAD instrument aboard LOFT including a specialized interface and in particular the design and construction of a prototype for the Panel-Back-End-Electronics (PBEE).

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